A triple-mode continuous-time sigma delta modulator with switched-capacitor feedback DAC for a GSM- EDGE/CDMA2000/UMTS Receiver
نویسنده
چکیده
Time jitter in continuous-time modulators is a known limitation on the maximum achievable signal-to-noise-ratio (SNR). Analysis of time jitter in this type of converter shows that a switched-capacitor (SC) feedback digital-to-analog converter (DAC) reduces the sensitivity to time jitter significantly. In this paper, an and continuous-time fifth-order modulator with 1-bit quantizer and SC feedback DAC is presented, which demonstrates the improvement in maximum achievable SNR when using an SC instead of a switched-current (SI) feedback circuit. The modulator is designed for a GSM/CDMA2000/UMTS receiver and achieves a dynamic range of 92/83/72 dB in 200/1228/3840 kHz, respectively. The intermodulation distance IM2, 3 is better than 87 dB in all modes. Both the and modulator consumes a power of 3.8/4.1/4.5 mW at 1.8 V. Processed in 0.18m CMOS, the 0.55-mm integrated circuit includes a phase-locked loop, two oscillators, and a bandgap.
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